Rapidus Explained: Japan's Last Bet on a 2nm Foundry — and Why It Refuses to Copy TSMC

Japan once led the world in semiconductors, but over the past two decades it fell far behind at the leading edge of manufacturing. Rapidus is an extraordinarily ambitious plan to leapfrog roughly two generations at once and start at 2nm. This article analyzes the company's founding and ownership, the scale of government support, its technology alliances with IBM and imec, and its competitive position and weaknesses — all from public sources. For the broader arc of Japan's chip industry, see Japan's growth strategy for semiconductors (in Japanese).

What kind of company is Rapidus?

Rapidus is a foundry — a company that manufactures advanced logic chips under contract — founded on August 10, 2022. The name is Latin for "fast," reflecting its pledge to stand up leading-edge process nodes (manufacturing generations) quickly and to deliver finished chips quickly.

Its most distinctive feature is its ownership: a public-private coalition in which eight companies — Toyota, Sony, Kioxia, NTT, SoftBank, NEC, Denso and MUFG Bank — invested a combined 7.3 billion yen (Rapidus / media reports). On top of that, the Japanese government channels massive R&D funding through the Ministry of Economy, Trade and Industry, making Rapidus a de facto national project.

Rapidus does not design its own products (it is not a fabless company); it aims to be a pure-play foundry manufacturing leading-edge chips designed by others. The industry's split between design companies and manufacturing companies is explained in why chip companies divided into designers and manufacturers (in Japanese).

How do the business model and government support work?

The Rapidus business model is straightforward to state: use massive government funding to stand up leading-edge manufacturing capability in one stroke, then win foundry orders from customers worldwide. Against the 7.3 billion yen of founding private capital, government support is on an entirely different scale (Rapidus / media reports).

R&D support from METI (via NEDO) has been raised in stages from 70 billion yen in 2022 to a cumulative total of roughly 2.4 trillion yen as of 2026 (Nippon.com). In June 2026, the Information-technology Promotion Agency (IPA) went further and invested 15 billion yen in equity — moving the government from grant-maker to direct shareholder (Rapidus / PR Newswire).

The manufacturing base is IIM-1 (Innovative Integration for Manufacturing) in Chitose, Hokkaido, where the pilot line started on April 1, 2025 (Rapidus Corporation). Volume production is targeted for 2027 — the halfway point of the business plan.

What decisively separates Rapidus from TSMC?

The biggest difference between Rapidus and TSMC is manufacturing philosophy. TSMC wins on volume; Rapidus is trying to win on speed and agility. They are foundries competing on deliberately different ground.

TSMC's model is batch production: giant fabs pushing huge volumes of identical chips, processing dozens of wafers at a time. Economies of scale drive down unit cost, and an unmatched record of volume production and high yield — the share of good chips per wafer — keeps rivals at bay. The whole machine is optimized to fill enormous orders from customers like Apple and NVIDIA cheaply and reliably (TSMC).

Rapidus concluded from the start that it cannot beat TSMC on scale, so it competes on a different axis. Its concept, called RUMS, combines single-wafer processing — running wafers through the line one at a time — with AI-driven process optimization to compress the time from design to finished chip (short TAT). It also plans to operate front-end and back-end (packaging) manufacturing as one integrated flow in Hokkaido, finishing small lots fast (Rapidus Corporation).

Why choose this strategy? Because fighting TSMC head-on in volume production is unwinnable on both scale and track record. Instead, Rapidus goes after the demand TSMC's large-lot optimization tends to underserve: customers who need small quantities, fast — AI prototyping and short-turnaround orders from emerging chip designers. Starting straight at 2nm serves the same logic: differentiate on delivering the leading edge quickly, not on volume. The concentration risk created by TSMC's dominance is covered in why the world cannot build smartphones or AI without one Taiwanese company (in Japanese), and the structure of the design-manufacturing split in why chip companies divided into designers and manufacturers (in Japanese).

Whether the strategy actually works, however, is unproven. Can single-wafer processing reach volume-grade yield and cost? Will fast turnaround alone pull customers away from a proven TSMC? That is the core of the Rapidus bet.

What are the technical strengths — and challenges?

The technical core of Rapidus is the 2nm-generation license from IBM and the research alliance with Belgium's imec. The 2nm generation is the current leading edge of chipmaking — territory that TSMC and Samsung have only recently brought into volume production.

IBM was the first in the world to demonstrate a 2nm-generation transistor, in 2021, and Rapidus adopted that technology as its starting point (IBM / Rapidus). It has also signed a cooperation agreement with imec, the international advanced-semiconductor research institute in Belgium, covering joint process development and talent training (imec / Rapidus).

Its transistors use GAA — gate-all-around, a nanosheet structure in which the gate wraps entirely around the current channel to suppress leakage — with 2nm patterns formed by EUV (extreme ultraviolet) lithography, which draws ultrafine features using very short-wavelength light. The history of transistors going three-dimensional is explained in why transistors evolved from planar to 3D structures (in Japanese).

The other differentiator is short TAT. To shrink the total turnaround time from design to finished chip, Rapidus integrates front-end wafer processing and back-end packaging — dicing chips and sealing them into packages — within Hokkaido.

It further plans to handle chiplet assembly in-house — integrating multiple small dies into a single package.

What role does Rapidus play in the supply chain?

Rapidus is the flagship of Japan's attempt to return to advanced logic manufacturing. Today, the companies capable of volume-producing 2nm-class leading-edge logic are essentially limited to TSMC, Samsung and Intel — with TSMC overwhelmingly dominant.

Against that oligopoly, Rapidus is trying to offer a "fourth option" from Japan. The scale of the concentration risk in TSMC is covered in why the world cannot build smartphones or AI without one Taiwanese company (in Japanese). Geopolitically, the US, Europe and Japan all want leading-edge logic capacity diversified beyond Taiwan — a tailwind of expectations behind Rapidus.

The expected customers are fabless companies without their own fabs and data-center operators designing custom AI silicon. Rapidus was reported to be in talks with more than 60 prospective customers as of 2026, aiming its short-TAT, small-lot capabilities at the segments TSMC underserves.

What do the market position and competitive structure look like?

Rapidus is a new entrant challenging a market ruled by three massive incumbents. An advanced foundry requires investment on the order of a trillion yen per leading-edge fab, plus years to ramp yield — the share of good chips per wafer. That entry barrier is the tallest wall Rapidus faces.

A five-forces view of the Rapidus competitive environment looks like this:

Note the paradox: the entry barrier cuts against Rapidus itself. The same wall that will block future competitors is the wall Rapidus is trying to climb right now. The core of the business problem is how to give fabless buyers a reason to leave a proven TSMC for a newcomer.

What are the weaknesses and risks?

The biggest weaknesses are the enormous funding requirement and the absence of confirmed customers. Building a leading-edge fab and ramping volume production requires trillions of yen, premised on government support (roughly 2.4 trillion yen cumulative as of 2026) (Nippon.com). Rapidus can keep running while support continues, but a path to standalone profitability has yet to be drawn.

The second risk is the yield ramp. The 2nm class is territory that even TSMC and Samsung struggled to bring up, and whether Rapidus — with a shallow base of manufacturing experience — can reach stable yield is unknown. Without yield, volume production does not pay.

Third, unsigned customers and scarce talent. Talks with more than 60 companies are reported, but no large long-term contract — the precondition for volume production — was confirmed as of 2026 (Rapidus Corporation). Engineers capable of running leading-edge logic production are globally scarce, and hiring and training will pace the ramp. For the talent and revival context of Japan's chip industry, see Japan's growth strategy for semiconductors (in Japanese).

What are the latest developments?

The two biggest recent moves are the pilot line start-up and direct government equity. The pilot line at IIM-1 in Chitose started on April 1, 2025, and in July 2025 the company announced it had confirmed working GAA transistors (Rapidus Corporation). The plan has moved from paper to functioning silicon.

On funding, Rapidus raised a combined 267.6 billion yen from the government and 32 private companies in February 2026, followed by the IPA's 15 billion yen direct equity investment in June 2026 (Rapidus Corporation). That investment converts the support model from grants to government shareholding, within a framework that could give the state up to 60% of voting rights if needed (Rapidus / PR Newswire).

The next milestone is the start of volume production in 2027. Can pilot-line yield data be scaled to production volumes, and can anchor customers be signed? Those two questions will decide the Rapidus bet. This article is an analysis of the business, technology and market structure — not investment advice.

Key takeaways

• Rapidus is a Japanese advanced-logic foundry founded in August 2022 — a public-private coalition with 7.3 billion yen from eight companies including Toyota, Sony, Kioxia and NTT, backed by the government.
• The decisive difference from TSMC is manufacturing philosophy: TSMC wins on batch production and economies of scale, while Rapidus runs single-wafer processing for short TAT and small-lot variety, avoiding the volume price war.
• Government R&D support totaled roughly 2.4 trillion yen as of 2026; in June 2026 the IPA invested 15 billion yen, making the state a direct shareholder.
• The technology core is IBM's 2nm license plus the imec alliance, GAA (nanosheet) transistors and EUV, with design-through-packaging integrated in Hokkaido for short-TAT differentiation.
• Its role is flagship of Japan's advanced-logic revival, challenging the TSMC-Samsung-Intel oligopoly; the IIM-1 pilot line started in April 2025.
• Risks: enormous capital needs, the yield ramp, unsigned customers and talent. Volume production is targeted for 2027; talks with 60-plus prospects are reported, but no major contract was confirmed as of 2026.