Japan Has Committed ¥2.35 Trillion to Rapidus — and Money Was Never the Hard Part

"After all this public money, can Japan really make leading-edge chips?" is the honest question most people ask. This article works through what happened, what Rapidus is, why 2nm is so hard, and what stands between the pilot line and volume production. For the full story of the company itself, see our deep dive: Rapidus Explained: Japan's Last Bet on a 2nm Foundry.

What happened?

In April 2026, Japan's Ministry of Economy, Trade and Industry approved an additional 631.5 billion yen in support for Rapidus. The breakdown: 514.1 billion yen for the front-end process (building the circuits) and 117.4 billion yen for the back-end process (assembly and packaging).

With this addition, cumulative state funding including all prior R&D support reached 2.354 trillion yen (note: cumulative figure based on media reports). The top-up alone is worth roughly 4 billion dollars — on par with the incentives countries have offered to attract the world's leading-edge foundries. The size of the number is itself the message: it shows how much weight Japan places on bringing leading-edge logic back onshore.

The funds go to 2nm pilot production at the IIM-1 fab in Chitose, Hokkaido, and to strengthening front-end wafer-processing capacity. Rapidus aims to start 2nm volume production in the second half of fiscal 2027 and targets a stock listing around fiscal 2031.

What is Rapidus?

Rapidus is a Japanese advanced-logic foundry — a contract chip manufacturer — founded in 2022. Eight major companies including Toyota, Sony, Kioxia and NTT invested alongside the government, and the company combines IBM's 2nm technology with the research base of imec in Belgium to attempt domestic production at the leading edge.

The centerpiece is IIM-1 (Innovative Integration for Manufacturing), its fab in Chitose, Hokkaido. The front-end pilot line started operating in 2025 and confirmed working 2nm-generation GAA transistors — gate-all-around devices, in which the gate wraps entirely around the current channel — on 300mm wafers. This is regarded as Japan's first working 2nm GAA demonstration, a key milestone before volume production. To see Japan's broader push to rebuild advanced manufacturing at home, read it alongside why TSMC built a fab in rural Kumamoto, where volume production has already begun.

Why is 2nm so hard?

2nm is hard because circuit dimensions (the process node) are approaching the limits of physics.

The "2nm" label does not mean any part of the chip actually measures two nanometers; it is a generation label for performance and density. This is one of the most misunderstood points in chipmaking, and we explain it in why 2nm no longer means a length of two nanometers (in Japanese). With each generation, the number of transistors — the switches that pass or block current — packed onto a single wafer grows explosively.

At the 2nm generation, the transistor structure switches from the conventional FinFET (fin-shaped) design to GAA, which wraps the current channel on all sides. It also requires mastering EUV (extreme ultraviolet) lithography — machines costing tens of billions of yen each that print the circuit patterns with extremely short-wavelength light. But buying the machines is not the same as making the chips: hundreds of process steps must each be tuned, and suppressing defects is a game of accumulated experience. Today, only TSMC and Samsung mass-produce at 2nm — that is how narrow this world is.

What stands between the pilot line and volume production?

The real wall to volume production is not money. It is three things: yield, customers and time.

First, yield. Yield — the share of good chips obtained from each wafer — must be raised to a level that survives volume economics. There is a vast gap between "it works" in pilot production and "enough good chips come out to make money" in commercial production.

Second, customers. With TSMC and Samsung already mass-producing 2nm, Rapidus must secure customers willing to choose a foundry still in its ramp-up. It aims to differentiate on short TAT (manufacturing turnaround time) and customized design support, but confirmed anchor customers remain hard to see (note: customer contract details are not public).

Third, time. Rapidus must hit its second-half-of-fiscal-2027 production window and connect it to the exit of a listing around fiscal 2031. Even with the money in place, if yield and customers do not line up, the plan's premises start to wobble (EE Times Japan).

What happens next?

The next few years are the watershed for whether Japan returns to leading-edge logic.

On the technical side, the working 2nm GAA demonstration on 300mm wafers is real progress, and the IIM-1 pilot line has entered the front-end refinement stage. The things to watch: the slope of the volume-yield ramp, whether confirmed customers appear, and whether the second-half-of-fiscal-2027 production date holds. If they line up, the 2-trillion-yen-plus of public money has a path to paying off as industrial infrastructure. If they do not, the economics of a state-backed foundry will face hard questions. Japan has cleared the money wall — it now stands in front of the execution wall.

[July 2026 update] Rapidus has also revealed its next move beyond 2nm: it plans to start 1.4nm process development in 2026, begin construction of a second Hokkaido fab in 2027, and target volume production around 2029. CEO Atsuyoshi Koike said the company is in talks with more than 60 prospective customers in AI, robotics and edge computing — sketching the next generation even as the 2nm ramp proceeds (Tom's Hardware, TechPowerUp, media reports).

Key takeaways

• In April 2026, METI approved an additional 631.5 billion yen for Rapidus, bringing cumulative R&D support to 2.354 trillion yen (based on media-reported totals).
• The addition breaks down into 514.1 billion yen for front-end and 117.4 billion yen for back-end processing, funding 2nm pilot work and front-end capacity at IIM-1 in Chitose.
• The IIM-1 pilot line started in 2025 and confirmed working 2nm GAA transistors on 300mm wafers.
• Volume production is targeted for the second half of fiscal 2027, with a listing targeted around fiscal 2031.
• The real wall is not money but yield, customers and time. The next few years decide whether Japan returns to leading-edge logic.
• [July update] Next-generation 1.4nm: process development from 2026, second fab construction from 2027, volume production around 2029. Talks under way with 60-plus prospective customers.