Tokyo Electron Controls ~90% of the Coater/Developer Market — Inside Japan's Largest Chip Equipment Maker

For a map of where each tool sits in the manufacturing flow, see Why the world's most advanced chips cannot be made without Japanese equipment. This article takes one company from that map — Tokyo Electron — and examines it as a business. The focus is technology and industry structure; we do not cover stocks or investment advice.

What kind of company is Tokyo Electron?

Tokyo Electron is Japan's largest semiconductor production equipment maker, founded in 1963. As the name suggests, it is a pure-play equipment company, covering a wide range of front-end tools — the machines that build the circuitry on the wafer. It is commonly abbreviated TEL. Headquarters are in Tokyo, with manufacturing and development sites in Miyagi, Kumamoto, Yamanashi and elsewhere.

The business rests on four pillars — coater/developers (coating and developing resist), etch systems (removing material), deposition systems (adding films) and cleaning systems — which together account for the bulk of equipment revenue. Alongside AMAT (Applied Materials), Lam Research and ASML, TEL is considered one of the Big Four in semiconductor production equipment, ranking fourth worldwide in equipment sales (Nomad Semiconductor).

How is Tokyo Electron's business structured?

Semiconductor production equipment accounts for more than 90% of Tokyo Electron's revenue. Consolidated revenue for the fiscal year ended March 2026 (FY2026) was about 2.44 trillion yen, a record high. By end application, logic/foundry accounts for the majority of sales, followed by DRAM (including HBM), then non-volatile memory such as 3D NAND (Tokyo Electron).

TEL's global share and position by tool category are shown below. The defining feature is that TEL is a diversified player: rather than leading a single process step, it holds top-tier positions across several.

(Source: BALD Engineering)

Figures vary by year and research firm. For what each process step does, see our Japanese explainers on etch equipment and Lam Research, deposition equipment and AMAT and cleaning equipment and SCREEN.

Why can TEL monopolize coater/developers?

A coater/developer is the tool that spreads photoresist — a light-sensitive film that hardens or dissolves under exposure — uniformly across the wafer, then develops it after lithography. Tokyo Electron holds roughly 90% of this market worldwide, and nearly 100% for EUV, the most advanced lithography — a de facto monopoly (BALD Engineering).

The reason is tight coupling with the lithography tool. A coater/developer operates physically docked to the exposure system, so coating and development precision matched to ASML's most advanced scanners is decisive. Decades of high-volume production have built a track record of protecting fab yield — the ratio of good chips — that makes new entry practically impossible. Because ASML handles exposure itself, TEL is ASML's complement, not its competitor.

What role does TEL play in the supply chain?

Tokyo Electron is the behind-the-scenes anchor of leading-edge front-end production lines. Its customers are the advanced foundries and IDMs — TSMC, Samsung, Intel — plus the memory makers Micron, SK hynix and Samsung. In short, the world's leading-edge fabs.

The front end repeats a cycle dozens of times: coat (coater/developer), expose (lithography — ASML), etch, deposit, clean. Because TEL can supply most of these steps except exposure, it is often entrusted with multiple process steps at once when a new fab ramps. The global market for wafer fab equipment (WFE) is dominated by the Big Five — AMAT, ASML, Lam, TEL and KLA — which together hold about 70%; TEL's overall share is roughly 9–12% (TechInsights).

What does the competitive structure look like?

Tokyo Electron's competitive environment looks like this. Overall, barriers to entry are extremely high and TEL's position is entrenched, but it faces external pressure from customer concentration and regulation.

The biggest issue is buyer concentration. Only a handful of leading-edge fabs exist worldwide, and TEL's results swing with their capital spending cycles. At the same time, the height of the entry barriers underpins TEL's long-term advantage. For the broader map of who does what in the industry, see the six roles of semiconductor companies.

What are the weaknesses and risks?

Tokyo Electron's two biggest risks are the equipment cycle and China export controls.

First, equipment demand tracks fab capital spending, so results rise and fall sharply with the memory cycle. Second, export controls: in July 2023, Japan added 23 categories of advanced semiconductor manufacturing equipment to its export licensing regime, and TEL's high China revenue exposure makes it structurally sensitive to regulation. China has been around the mid-30% range of TEL's revenue in recent years, and that share is trending down as local Chinese toolmakers rise (Nikkei XTECH).

In addition, Lam Research leads in etch and AMAT leads parts of deposition, so TEL does not hold coater/developer-level dominance across every step. Its heavy dependence on one step — coating and developing — is, viewed from the other side, a structural weakness.

What are the latest developments?

Tokyo Electron is stepping up leading-edge investment on the back of AI chip demand. R&D spending expanded to roughly 300 billion yen in FY2026, and the company is building new development and manufacturing sites in Miyagi and Kumamoto. Scaling in logic/foundry and the stacking of DRAM for HBM (high-bandwidth memory) are lifting demand for deposition, etch and coater/developer tools alike (Tokyo Electron).

Over the medium term, TEL targets growth toward revenue above 3 trillion yen, driven by AI demand. As chips scale down and stack up, the number of coating/developing, deposition and etch steps per wafer keeps increasing — a structural tailwind for the value of TEL's equipment.

Key takeaways

• Tokyo Electron (TEL), founded in 1963, is Japan's largest semiconductor equipment maker and the world's No. 4 diversified equipment vendor by revenue.
• Its greatest strength is a monopoly in coater/developers: roughly 90% global share and nearly 100% for EUV. It is also top-tier in deposition, etch and cleaning.
• FY2026 revenue was about 2.44 trillion yen, a record. Logic/foundry is the majority of sales, followed by DRAM including HBM.
• Customers concentrate in leading-edge fabs — TSMC, Samsung, Intel and the memory makers. TEL is one of the Big Four alongside AMAT, Lam and ASML.
• Risks are the equipment cycle and China export controls (China is around the mid-30% range of revenue); high entry barriers support its long-term advantage.